Engineering and Marketing Documentation Services
The StatisticsMatrix is an end-to-end documentation and information provider. It participates in the development and production of engineering, marketing and operational documentation for technology companies. This includes the creation, editing, proofing, formatting and factual verification of website designs and content, white papers, blog posts, magazine articles, application notes, market research reports, press releases, conference papers, Power Points, data sheets, financial reports patents, design manuals, and technical illustrations like schematics, flow charts and diagrams.

Subject Matter Expert Databases
In support of these documentation services, the StatisticsMatrix produces subject matter expert databases. These databases are created to directly support our own and our clients business, marketing, engineering and investment research efforts. Clients can specify custom subject matter expert databases for their unique needs. This includes content, fields, taxonomy (classification schemes) as well view, search and display templates. These databases can be exported to a client’s internal systems via license or be based on StatisticsMatrix pre-built database driven content management systems.

Contact:
Mark Stansberry
Email: mark@statisticsmatrix.com
URL: https://www.statisticsmatrix.com
Cell/Text: (707)235-4095

About The Founder

Mark Stansberry …..CV/RESUME

Education: BSEE San Jose State University

LinkedIn: https://www.linkedin.com/in/mark-stansberry-82682860/
LinkedIn Followers: 3500 +

Over 30 years as a consultant, engineer, programmer, market research analyst, and technical writer within the Semiconductor Ecosystem. Worked extensively on a variety of technical marketing, engineering, software and business development projects that range across the entire electronic design and software development domain in specific relation to semiconductor chip design, semiconductor applications and EDA tools development.

Hardware Market Focus: AI Compute, Communicate and Compare Processors and Systems Architecture,  Advanced ASIC Chip Design, AI Data Center Design, Edge Design,  AI Hardware Architecture, Energy Efficiency Algorithms,  Photonics, Fiber Optics, Neuromorphic Processors, Ethernet Networks and Optical Transceivers, CAM, RISC, X86 CISC and AI Processors, Analog Neural Networks, Cache and System Memory Architecture, Sensors, Sensor Signal Processing Chains, Analog Front Ends

Software Market Focus: Software Architecture, Middleware, Firmware, APIs, SDKs, Frameworks,  Operating Systems, Linux, Unix,  and Ubuntu, CLI, SaaS Billing and Learning Management System (LMS) Microservices, Business Process Automation, Customer Relations Management, Electronic Design Automation Platforms, Role Based Access Control, Authentication, Cybersecurity, Power Management

EDA Design Tool Focus: Have worked with a variety of electronic circuit design tools, Siemens (Mentor), Cadence, HSPICE, LTSPICE,

Subject Matter Experts (SMEs) Focus: Interview semiconductor SMEs about their semiconductor technology, products, associated applications and market potential. SME’s include high level executive staff, engineering directors, R&D design engineers, product marketing and strategic marketing managers. SME interviews are part of the research process I use for the writing of trade press articles, technology manuals, white papers, and customer-facing documents. In other cases, I contact chip companies to verify information in the Semiconductor & IP Core Database and associated vendor directories like the RISC-V vendor directory.

Publication Trade Journal Samples
Embedded.com Publication List, https://www.embedded.com/authors/cap-mark-c-stansberry
Power Electronic News: https://www.powerelectronicsnews.com/hydrogen-is-it-the-energy-answer-for-todays-ai-data-centers/
EDN Publications List: https://www.edn.com/author/mark-stansberry/

Additionally, have over 30 other historical publications related to ASIC design and EDA design tools. A list can be provided on request.

Illustrated Graphic Samples
URL: https://statisticsmatrix.com/matrix-posters-and-cheatsheets/
URL: https://www.redbubble.com/people/markcstansberry/shop

LinkedIn Profile
LinkedIn URL includes numerous electronic and technology posts that I write on a regular basis. I also write in-depth technology and market-related comments on LinkedIn posts regularly
URL:. https://www.linkedin.com/in/mark-stansberry-82682860/

LinkedIn Top Post of the Year, Optical Transceiver Demultiplexer.
Optical Transceiver Multiplexing
LinkedIn URL: https://www.linkedin.com/posts/mark-stansberry-82682860_optical-transceivers-dielectric-activity-7145997901679190017-frZf?utm_source=share&utm_medium=member_desktop&rcm=ACoAAAzvvJ4BXBHbVU4e2rU_m43kQHxClvPgbfE

Sample Content Database: Produce the Semiconductor & IP Core Subject Matter Expert Database for the development of system designs, semiconductor and EDA market analysis.  

Figure: Hybrid Chatbot,      Prompt Assisted Access

Content Development Experience Summary

AI Chatbot and Agent Development Focus: Document Data Sets, AI Import Ready Documentation, Database Classification Schema and Taxonomy, Hybrid AI Agent Development, Statistical Weight Analysis,

Content Databases:  Repositories and Wikis, AI Chatbot document data set compatibility, Apple Claris FileMaker Pro database software with scripts programming

Literature Production: Trade Press Articles, Design, Instruction and Applications Manuals, White Papers, Conference Papers, Market Research Reports, PowerPoint Presentations, Electronic Schematics, Trade Press Show Posters, UX/UI Graphical Design Interfaces. EDA Graphical Design Interfaces, Electronics and Mathematics Books

Office and Code Documentation Tools: Microsoft Word, PowerPoint, Excel, Figma, SharePoint, Outlook, Adobe Illustrator, InDesign, Multi-Contributor JIRA Wikis, Content Management Systems (CMS), Camtasia, GitHub, assorted XML and DITA editing tools, emerging software developer documentation and code development tools.

Code and API Explanations: CLI Docker Containers, HTML, markdown, JavaScript, Ruby, JAVA, PHP, Python, SQL and associated APIs, libraries and frameworks.

Standard Operating Procedures: Follow standard operating processes (SOP) according to document production flows and style guidelines. Have an established process for the creation of documents. This includes a document review and sign-off checklist. Concision, document consistency and technical fact checking are part of the document review process.

Style Guides and Document Checklists: Create and follow style guidelines, like the AP Style Guide. Create document production checklists. Ensure documents are factually correct through engineering verification reviews, Produce new revisions according to established CI/CD revision processes.

Employment Overview

Recent writing projects have been with Embedded.com (solar satellites, optical transceivers, 3D robotics, wafer fabrication and equipment), Power Electronics News (hydrogen powered AI data centers), The Financial Times (foreign direct investment), Intel Corp (AI compute and communicate, network interconnectivity,  knowledge content database development, multi-contributor JIRA Wikis,  SaaS secure microservices, APIs), POET Technologies (fiber optic communicate), Linear Integrated Systems (analog machine IoT),Verisilicon (ASIC, graphical processor units, RISC embedded systems, AI compute), and DjaoDjin (APIs, SaaS financial billing and learning management systems,  Kubernetes, RBAC, security, UNIX, CLI, Python).

Other major assignments that I have worked on that contain APIs include EDA systems and circuit simulation manuals. EDA physical design manuals and analog and mixed signal circuit design books. These assignments required that I design and simulate example circuits and chips: Verilog, VHDL, SPICE, and more.  

Employee, Contractor, and Business Founder History

Technical, Business Development, and Marketing Writer

Stansberry’s MarketQuest

December 2017 to Present

As a consultant, engineer, writer and market analyst, I work as an employee, independent contractor on W2 and as a DBA. My technology focus is on advanced AI server processers, ASIC, chiplet and SOC EDA design flows, IP cores, embedded systems, hardware firmware and software applications.

For the Intel Corporation contracts,  I oversaw the production of documentation for Intel’s next generation AI compute and communicate processors, Ethernet solutions, AI server benchmarks, presilicon simulators and Intel’s cybersecurity hybrid hardware and software SaaS services. As part of Intel’s assignments, I  created original engineering and marketing content based on information gathered from subject matter experts, internal documentation and outside technical and marketing sources. This included technical manuals that were several hundred pages in length.

Responsibilities at Intel included research, writing, curation, editing, proofing, formatting and standardization of engineering and marketing documents and multi-contributor Wikis. This included the review, editing and incorporation of documents from over twenty AI subject matter experts. I was also responsible for the classification of Wiki content: creation of sortable keyword phrases and alphabetical classification of sections, paragraphs, images, files, and tables.

For the POET Technologies writing engagement, the documentation focused on POET’s optical modules, chiplets and photonic integrated circuits as used in AI data centers. This included POET’s 800G and 1.6T optical transceivers, photonic integrated circuits and optical, electrooptical and optoelectrical IP cores, and POET’s optical interposer. As part of this work a white paper was produced and a 80-page report on POET’s ecosystem and optical technology (Waveform Division Multiplexing, modulation and demodulation circuits). 

For Linear Integrated Systems I researched, designed, simulated, tested and wrote about analog and mixed signal neural network circuit designs for IoT applications, RF receivers and transmitters, sensor front-end amplifier design and signal processing chains for numerous high-impedance front-end sensor-based designs like observatory telescopes.  This work included the circuit simulation of neural network circuits on the LTPICE simulator:  DC, frequency, transient, noise and energy domains. Work also  included JFET model development at the transistor and behavioral levels.

The project resulted in a 300-page circuit applications design manuscript; several articles published in EDN magazine related to analog neural networks and sensor applications, and a magnetic sensor research report.

At Verisilicon much of the work revolved around the development of portable microdisplay devices used in IoT applications and based on real time operating systems (RTOS). Central to the technical presentation documentation created was the graphical processing unit (GPUs) and the single instruction multiple data (SIMD) AI graphics algorithms used. Extensive research on microdisplays was conducted, with a specific focus on how to design ARM Cortex and GPU centric systems for different types of microdisplays. 

Cypress Information Resources
Founder, Technical Marketing,  Market Research Report Writer, Applications and Business Development
Los Gatos, CA
December 1987 to December 2016

Clients I secured and worked for at Cypress Information Resources include start-ups, mid-size and Fortune 500 semiconductor EDA and system companies. At Cypress I established a client base of over 100 companies. This included companies that purchased the standard annual technical market reports and ordered custom reports.

At Cypress, I implemented international marketing, sales, advertising, and distribution programs for the semiconductor market research reports and databases: The Integrated Circuit Product and Technology Database, The IC Product and Market Directory, The Global Semiconductor Foundry Report, the Global Fabless Semiconductor Report, and the Integrated Circuit Process Technology Report. Sold individually or as a four-volume set, over a thousand pages in total.

Custom engineering and market research documents were created for American Microsystems (Microcontrollers), AtopTech (EDA Physical Design ASIC), Atrenta (DFT ASIC), C-Cube Microsystems (Graphic Processors, Compression), Fairchild Semiconductor (ASIC, EDA, Mentor), Fujitsu Semiconductor (Microprocessors, SPARC), Hill and Knolton (RISC Processor) , HTE Research (Semiconductor Market), Integrated Device Technologies (Memory SRAM, FIFO), Meta-Software (EDA Spice), Media Vision (Audio Music),, MIPS Computer Systems (RISC microprocessors), National Semiconductor (ASICs) , OneNav (GPS), Red Herring (EDA technology and market report), Rohm Corp (Radio Frequency Identification, RFID, microcontrollers), Sycon Design Systems (EDA Physical Design), Wispry (Radio Frequency, RF, MEMs)., VLSI System Design (Intel cache architecture and Intel Ethernet solutions), and others.

Founder, Business Development, Marketing, Programmer, Technical Writer, Illustrator, Instructor
Bookmark Tutoring
Santa Rosa, CA

October 2004 to 2020

Instructed and created educational training materials, apps and marketing collateral needed for Bookmark. Documentation related to STEM and STEAM subjects: Algebra, Geometry, Trig, Statistics, Calculus, Chemistry, Electronics, Computer Science, Web Design, Technical Illustration. Performed educational research, compiled subject specific solutions database, and taught students and groups of students. Implemented a self-learning program for students to learn more effectively in high school and in college.

Coded and documented a complete graphic design automation program in JavaScript, see GUI and resultant output below. Coded the user interface and the drawing algorithm based on over thirty-math functions within numerous modules and subroutines. Responsible for the documentation of the API, the software code, and the end user documentation. Also, I created training material for CSS, C++, JAVA, JavaScript, HTML, Markdown, Node.js, PHP, Ruby Visual Basic, Visual Studio, XML, XLS, Python, jQuery, and Hadoop multiprocessor software programming projects

         Figure: UI/UX Interface With Online Help Documentation

Digital ASIC Application Engineer
National Semiconductor
Santa Clara, CA
October 1984 to October 1987

Performed ASIC design feasibility studies. Assessed proposed electronic designs for implementation such as PLDs, gate arrays, standard cell, and custom chips. Generated analysis reports that summarized the cost, silicon area, I/O count, power pin count, packaging, timing, power consumption, reliability, thermal stress, testability, partitioning, transient and noise specifications of proposed chip solutions. Performed simulation and analysis of customers’ logic level and transistor level designs with SPICE circuit, logic, and in-house simulators. Also simulated numerous logic cores within a design for test framework and design for manufacturing environment (fault grading tools).

Designed IP cores for ASIC library implementation. Completed the design of a high speed 12X12 digital multiplier with pipeline registers and carry look ahead logic used in high-speed Digital Signal Processing (DSP)applications. Designed complete set of 7400 digital logic IP core series for ASIC library implementation. Other designs included test chips for the evaluation of CMOS semiconductor manufacturing process technology.

Wrote and published articles for leading electronic trade press magazines: Integrated System Design, Electronic Design News (EDN), EETimes, Electronic News, Computer Design, Electronic Products as well as the IEEE and number of foreign trade press magazines. Consulting editor for Integrated Circuit magazine. Topics included ASCs, gate arrays, testability, EDA design flows, circuit and logic simulation, timing, classification centric counter design, transients and noise and power management circuitry. Trained and advised field applications engineers in ASIC design methodology, ASIC feasibility, critical path analysis and testability.

Analog Integrated Circuit Electronics Applications Engineer
Exar Integrated Systems
Sunnyvale, CA
March 1982 to October 1984
Analog integrated circuit failure analysis, design, and development of application reference boards for instrumentation applications, supervision of technicians. Writing of market research reports, application notes and data sheets related for analog, digital and mixed signal circuits. This includes chips used in disk drives, modems and test and measurement equipment. Specific types of chips and designs included Bessel filters, delta modulators, digital to analog and analog to digital converters, floppy disk read amplifiers, FSK and PSK modem chips, op amps, timers, phase lock loops, voltage-controlled oscillators, and waveform generators

Analog and Mixed Signal Electronics Test Engineer
Fairchild Semiconductor
Mountain View CA
December 1979 to March 1982
Design of electronic interface boards for high volume testing of analog and interface integrated circuits at wafer probe and final test. Circuits included Fairchild’s line of operational amplifiers, comparators, and drivers. Writing of associated software test programs for LTX and Sentry machines. Evaluation of volume production test equipment for purchase.

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